09 SME2 · widening multiply-add
FMLAL
Half-precision operands, single-precision tile: a widening multiply-add with an indexed vector.
fmlal za.s[w11, 4:5], z0.h, z1.h[2]Types: z0.h, z1.h — 16-bit half floats; the tile accumulates 32-bit singles, so every product widens. Drawn at SVL = 128 bits: 8 half operands and a 16-slice ZA.S array; at SVL = 512: 32 halfs, 64 slices, the index picking within each 128-bit segment.
z0.h
× z1.h[2] = 3
za.s[w11, 4:5]
4,00
4,11
4,20
4,32
5,01
5,10
5,22
5,30
ZA slices
ZA[s, c] += FP32(z0.h[h]) × FP32(z1.h[idx])
Ready. Pick an index in z1.h, then play the widening multiply-add.
Arrow keys step, space plays or pauses.
This browser prefers reduced motion. Play still runs the instruction and jumps straight to the result.
Reading the picture
-
Narrow in, wide out
z0.h and z1.h hold 16-bit halfs; the tile accumulates 32-bit singles. Every product is widened before it lands — the classic mixed-precision trick for more throughput per byte.
-
One indexed operand
The multiplier is a single half picked from z1.h by the [index] immediate. Switch the index above and watch the whole tile pair rescale — kernels use this to walk a weight column without reloading.
-
Two slices at once
This page sets W11 = 0, so the offset 4:5 alone selects the two adjacent ZA slices 4 and 5: even halfs of z0.h feed slice 4, odd halfs feed slice 5, in element order. There is no predicate — every element lands.
This pass multiplies by z1.h[2] = 3.